Dynomotion

Group: DynoMotion Message: 7776 From: Steve Date: 6/24/2013
Subject: JP4 I/O - how much power does it take to trigger inputs?
I am having a lot of trouble using these pins as inputs, perhaps because of the built in pull downs.

The I/O spec is a very tiny 10ma and these inputys still have not triggered a 3.3V 7.5ma. They trigger at 10ma.

I do not know the exact crossover point, but it is between 7.5 and 10 somewhere. I don't think it is reasonable to have to push close to the max spec just to trigger an input.

Question:

Why is so much power required to trigger an input (I/O #19)?

Is 10ma the real number or is that conservative?

What is the recommended votage and ma to trigger inputs on JP4?

Thanks,

- Steve
Group: DynoMotion Message: 7779 From: Tom Kerekes Date: 6/24/2013
Subject: Re: JP4 I/O - how much power does it take to trigger inputs?
Hi Steve,

The KFLOP outputs are Xilinx 3.3V LVTTL outputs as specified in this Xilinx data sheet:
http://www.xilinx.com/support/documentation/data_sheets/ds312.pdf

They are actually conservatively rated at +/-16ma but we recommend +/-10ma mainly for the case where someone decides to have all 46 source or sink max current at the same time.

The Aux Ports have strong 150ohm termination on 8 pins which is required to minimize ringing for cases like SnapAmp that send 64MBits/sec though the port.

The maximum input threshold for the LVTTL inputs is 2.0V.  The current required to produce 2.0V across a 150 ohm resistor is 13.3ma.  The typical threshold will be less.  But to have good noise margin something around 16ma should be applied
 
HTH
Regards
TK